Zeitpunkt Nutzer Delta Tröts TNR Titel Version maxTL Mo 22.07.2024 00:01:10 61.959 +1 3.567.825 57,6 Fosstodon 4.2.10 500 So 21.07.2024 00:01:07 61.958 +1 3.564.861 57,5 Fosstodon 4.2.10 500 Sa 20.07.2024 00:01:10 61.957 +1 3.561.604 57,5 Fosstodon 4.2.10 500 Fr 19.07.2024 13:57:34 61.956 -1 3.558.474 57,4 Fosstodon 4.2.10 500 Do 18.07.2024 00:00:27 61.957 +1 3.553.476 57,4 Fosstodon 4.2.10 500 Mi 17.07.2024 00:01:10 61.956 -1 3.550.157 57,3 Fosstodon 4.2.10 500 Di 16.07.2024 00:00:36 61.957 +6 3.547.999 57,3 Fosstodon 4.2.10 500 Mo 15.07.2024 00:00:01 61.951 +1 3.544.794 57,2 Fosstodon 4.2.10 500 So 14.07.2024 00:00:00 61.950 +2 3.542.390 57,2 Fosstodon 4.2.10 500 Sa 13.07.2024 00:00:08 61.948 0 3.539.632 57,1 Fosstodon 4.2.10 500
Craig Bishop (@craigjb) · 07/2023 · Tröts: 12 · Folger: 6
Mo 22.07.2024 19:28
New FPGA driver board and in-progress shots. The 9 flat flex connectors with 4 SPI buses each work like a charm. No SI issues yet, but I definitely don’t want to measure EMI on this beast. There’s room to spread the clocks over different phases if needed though.
FOGA board with 9 flat flex connectors, 40 pins each, to drive all the LCDs
18x8 grid of 128x128 pixel LCDs mounted on 3D printed key caps on mechanical key switches
One of the LCDs had a soldering issue on the 12-pin flat flex connector on the bottom
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